• Mixed Signal ASICs Designer

    Job Location US-MA-Cambridge
    Posted Date 6 months ago(10/16/2017 1:14 PM)
    Requisition ID
  • Overview

    Draper is an independent, nonprofit research and development company headquartered in Cambridge, MA. The 1,700 employees of Draper tackle important national challenges with a promise of delivering successful and usable solutions. From military defense and space exploration to biomedical engineering, lives often depend on the solutions we provide. Our multidisciplinary teams of engineers and scientists work in a collaborative environment that inspires the cross-fertilization of ideas necessary for true innovation. For more information about Draper, visit www.draper.com.


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    Equal Employment Opportunity

    Draper is committed to creating a diverse environment and is proud to be an affirmative action and equal opportunity employer.   We understand the value of diversity and its impact on a high-performance culture.  All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, disability, age, sexual orientation, gender identity, national origin, veteran status, or genetic information.   


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    The Microelectronics group at Draper consists of a small group of motivated engineers engaged in the development of analog/mixed-signal application-specific integrated circuits (ASICs). We enjoy the challenge of specifying and realizing ASICs from the ground up. We are looking to add new members to our team who are capable of specifying and architecting ASICs, designing circuits using the Cadence tool suite, leading tasks, and interfacing with other engineers in a highly collaborative environment.


    Required Skills:


    1)    MOS/Bipolar transistor-level design, including biasing and both large & small-signal operation

    2)    Comprehensive understanding of transistor architecture(s) for one or more of the following:

    1. Operational Amplifiers
    2. Reference circuits (bandgap, gm-tracking, …etc.)
    3. Data Converters (ADC/DAC)
    4. Power Conditioning Circuits (Charge-Pump, Boost/Buck converter, LDO, …etc.)

    3)    Design and simulation experience with Cadence front-end tools

    1. Virtuoso Schematic Entry
    2. Spectre simulation using ADE, preferably using IC6.1.7

    4)    Familiarity with either MOSIS or TAPO MPW runs

    1. Taped out with IBM/GF, TSMC, or other similar foundry

     Desirable Skills:


    1)    Experience with sensor-interface circuitry

    2)    Experience with back-end flow using either Cadence or Calibre tools

    3)    Top-level simulation & layout experience

    4)    Experience with MOS advanced nodes below 32nm





    BS, MS, or PhD degree in a relevant technical field of study and five or more years of experience designing mixed-signal integrated circuits.




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